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four-bit adder, 342 343 state descriptions in, 407 408
frequency counter project, 710 714 (see also HDL) state machine, simple, 428 429
full adder, single-bit, 347 STD_LOGIC, 180, 274
full-featured counter, 414 415 values, 181
GENERATE statement, 346 348 STD_LOGIC_VECTOR, 180
IF/THEN/ELSE, 187, 428, 435, 644, 653 traffic light controller, 432 435
IN, 179 truth tables, 182 184
INTEGER, 180, 187, 411, 415, 643 644 concatenating, 182 183
intermediate signals in, 117 selected signal assignments, 182 184
iterative loop, 347 TYPE, 428
JK flip-flop, 275 VARIABLE, 275 276, 407 408, 466, 643 644, 703 704
simulation, 276 WHEN, 641, 647 648
keypad encoder project (HDL), 687 693 WITH, 182
(see also HDL) VLSI (very large scale integration), 154 155, 489
simulation, 693 Volatile memory, 788
solution, 691 693 Voltage
LIBRARY, 647 648 comparators, 554 556
components, 273 275 controlled oscillator, linear (VCO), 758
libraries, 180 to frequency ADC, 758
libraries of parameterized modules, 347 348 level translator, 553
local signals, 106 107 levels, invalid, 494 495
LPMs, 348 parameters for digital ICs, 490 491
TOCCMI02_0131725793.QXD 12/21/05 10:27 PM Page 940
940 INDEX
Write operation
W
CPU, 794
Wave-drive sequence (HDL stepper-motor), 680
defined, 788
Wired-AND connection, 535 536
RAM, 816
Word, 37 39
size, 39
Z
Write cycle, 255
Zero
address setup time, 820
count, 12
data hold time, 820
insertion force socket (ZIF), 172
data setup time, 820
time, 820
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